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1. general description the 74hc166-q100; 74hct166-q100 is an 8-bit serial or parallel-in/serial-out shift register. the device features a serial data in put (ds), eight parallel data inputs (d0 to d7) and a serial output (q7). when the parallel enable input (pe ) is low, the data from d0 to d7 is loaded into the shift register on the next low-to-high transition of the clock input (cp). when pe is high, data enters the register serially at ds with each low-to-high transition of cp. when the clock enable input (ce ) is low data is shifted on the low-to-high transitions of cp. a high on ce disables the cp input. inputs include clamp diodes which enable the use of current limiting resistors to interface inputs to voltages in excess of v cc . this product has been qualified to the automotive electronics council (aec) standard q100 (grade 1) and is suitable for use in automotive applications. 2. features and benefits ? automotive product qualif ication in accordance with aec-q100 (grade 1) ? specified from ? 40 ? c to +85 ? c and from ? 40 ? c to +125 ? c ? synchronous parallel-to-serial applications ? synchronous serial input for easy expansion ? complies with jedec standard no. 7a ? input levels: ? for 74hc166-q100: cmos level ? for 74hct166-q100: ttl level ? esd protection: ? mil-std-883, method 3015 exceeds 2000 v ? hbm jesd22-a114f exceeds 2000 v ? mm jesd22-a115-a exceeds 200 v (c = 200 pf, r = 0 ? ) ? multiple package options 3. ordering information 74hc166-q100; 74hct166-q100 8-bit parallel-in/seria l out shift register rev. 1 ? 25 september 2013 product data sheet table 1. ordering information type number package temperature range name description version 74hc166d-q100 ? 40 ? c to +125 ? c so16 plastic small outline package; 16 leads; body width 3.9 mm sot109-1 74hct166d-q100 74HC166PW-Q100 ? 40 ? c to +125 ? c tssop16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm sot403-1
74hc_hct166_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 25 september 2013 2 of 19 nxp semiconductors 74hc166-q100; 74hct166-q100 8-bit parallel-in/seria l out shift register 4. functional diagram fig 1. logic symbol fig 2. iec logic symbol aaa-008816 q7 13 1 15 67 d0 pe ds cp ce d1 d2 d3 d4 d5 d6 d7 2 3 4 5 10 11 12 14 9mr aaa-008817 6 7 15 2,1d 2,1d 1 srg8 r m2 c1/2 9 1 2 3 4 5 10 11 12 14 13 2,1d fig 3. functional diagram aaa-008818 8-bit parallel/serial-in/ serial-out shift register ds 9 1 6 15 2 q7 d0 13 3 d1 4 d2 5 d3 10 d4 11 d5 12 d6 14 d7 mr cp ce pe 7
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74hc_hct166_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 25 september 2013 4 of 19 nxp semiconductors 74hc166-q100; 74hct166-q100 8-bit parallel-in/seria l out shift register 5. pinning information 5.1 pinning 5.2 pin description fig 5. pin configuration (so16 and tssop16) +&4 +&74 ' 6 9 && ' 3( ' ' ' 4 ' ' & ( ' & 3 ' *1' 05 ddd table 2. pin description symbol pin description ds 1 serial data input d0 to d7 2, 3, 4, 5, 10, 11, 12, 14 parallel data inputs ce 6 clock enable input (active low) cp 7 clock input (low-to-high edge-triggered) gnd 8 ground (0 v) mr 9 asynchronous master reset (active low) q7 13 serial output from the last stage pe 15 parallel enable input (active low) v cc 16 positive supply voltage
74hc_hct166_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 25 september 2013 5 of 19 nxp semiconductors 74hc166-q100; 74hct166-q100 8-bit parallel-in/seria l out shift register 6. functional description [1] h = high voltage level; h = high voltage level one set-up time prior to the low-to-high clock transition; l = low voltage level; l = low voltage level one set-up time prio r to the low-to-high clock transition; q = state of the referenced output one set-up time prior to the low-to-high clock transition; x = don?t care; ? = low-to-high clock transition. table 3. function table [1] operating modes inputs qn registers output pe ce cp ds d0 to d7 q0 q1 to q6 q7 parallel load i i ? x i l l to l l ii? x h h h to h h serial shift h i ? l x l q0 to q5 q6 hi ? h x h q0 to q5 q6 hold ?do nothing?xhxxxq0q1 to q6q7 fig 6. typical clear, shift, load, inhibit, and shift sequences h l h l h l h h load aaa-008820 clear cp mr ds shift/ load d0 d1 d2 d3 d4 d5 d6 d7 q7 ce mode control inputs parallel inputs output inhibit serial shift serial shift hh l hhh ll
74hc_hct166_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 25 september 2013 6 of 19 nxp semiconductors 74hc166-q100; 74hct166-q100 8-bit parallel-in/seria l out shift register 7. limiting values [1] the input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] p tot derates linearly with 8 mw/k above 70 ? c. [3] p tot derates linearly with 5.5 mw/k above 60 ? c. table 4. limiting values in accordance with the absolute maximum rating system (iec 60134). voltages are referenced to gnd (ground = 0 v) symbol parameter conditions min max unit v cc supply voltage ? 0.5 +7 v i ik input clamping current v i < ? 0.5 v or v i >v cc +0.5v [1] - ? 20 ma i ok output clamping current v o < ? 0.5 v or v o >v cc +0.5v [1] - ? 20 ma i o output current ? 0.5 v < v o < v cc +0.5v - ? 25 ma i cc supply current - 50 ma i gnd ground current ? 50 - ma t stg storage temperature ? 65 +150 ?c p tot total power dissipation t amb = ? 40 ? c to +125 ?c so16 package [2] - 500 mw tssop16 package [3] - 500 mw
74hc_hct166_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 25 september 2013 7 of 19 nxp semiconductors 74hc166-q100; 74hct166-q100 8-bit parallel-in/seria l out shift register 8. recommended operating conditions 9. static characteristics table 5. recommended operating conditions voltages are referenced to gnd (ground = 0 v) symbol parameter conditions 74hc166-q100 74hct166-q100 unit min typ max min typ max v cc supply voltage 2.0 5.0 6.0 4.5 5.0 5.5 v v i input voltage 0 - v cc 0- v cc v v o output voltage 0 - v cc 0- v cc v t amb ambient temperature ? 40 - +125 ? 40 - +125 ?c ? t/ ? v input transition rise and fall rate v cc = 2.0 v - - 625 - - - ns/v v cc = 4.5 v - 1.67 139 - 1.67 139 ns/v v cc = 6.0 v--83---ns/v table 6. static characteristics at recommended operating conditions; volt ages are referenced to gnd (ground = 0 v). symbol parameter conditions 25 ?c ? 40 ? c to +85 ?c ? 40 ? c to +125 ?c unit min typ max min max min max 74hc166-q100 v ih high-level input voltage v cc = 2.0 v 1.5 1.2 - 1.5 - 1.5 - v v cc = 4.5 v 3.15 2.4 - 3.15 - 3.15 - v v cc = 6.0 v 4.2 3.2 - 4.2 - 4.2 - v v il low-level input voltage v cc = 2.0 v - 0.8 0.5 - 0.5 - 0.5 v v cc = 4.5 v - 2.1 1.35 - 1.35 - 1.35 v v cc = 6.0 v - 2.8 1.8 - 1.8 - 1.8 v v oh high-level output voltage v i = v ih or v il i o = ? 20 ? a; v cc = 2.0 v 1.9 2.0 - 1.9 - 1.9 - v i o = ? 20 ? a; v cc = 4.5 v 4.4 4.5 - 4.4 - 4.4 - v i o = ? 20 ? a; v cc = 6.0 v 5.9 6.0 - 5.9 - 5.9 - v i o = ? 4.0 ma; v cc = 4.5 v 3.98 4.32 - 3.84 - 3.7 - v i o = ? 5.2 ma; v cc = 6.0 v 5.48 5.81 - 5.34 - 5.2 - v v ol low-level output voltage v i = v ih or v il i o = 20 ? a; v cc = 2.0 v - 0 0.1 - 0.1 - 0.1 v i o = 20 ? a; v cc = 4.5 v - 0 0.1 - 0.1 - 0.1 v i o = 20 ? a; v cc = 6.0 v - 0 0.1 - 0.1 - 0.1 v i o = 4.0 ma; v cc = 4.5 v - 0.15 0.26 - 0.33 - 0.4 v i o = 5.2 ma; v cc = 6.0 v - 0.16 0.26 - 0.33 - 0.4 v i i input leakage current v i = v cc or gnd; v cc =6.0v --? 0.1 - ? 1- ? 1 ? a i cc supply current v i = v cc or gnd; i o =0a; v cc =6.0v --8.0- 80 - 160 ? a
74hc_hct166_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 25 september 2013 8 of 19 nxp semiconductors 74hc166-q100; 74hct166-q100 8-bit parallel-in/seria l out shift register c i input capacitance -3.5-- - - - pf 74hct166-q100 v ih high-level input voltage v cc = 4.5 v to 5.5 v 2.0 1.6 - 2.0 - 2.0 - v v il low-level input voltage v cc = 4.5 v to 5.5 v - 1.2 0.8 - 0.8 - 0.8 v v oh high-level output voltage v i = v ih or v il ; v cc = 4.5 v i o = ? 20 ? a 4.4 4.5 - 4.4 - 4.4 - v i o = ? 4.0 ma 3.98 4.32 - 3.84 - 3.7 - v v ol low-level output voltage v i = v ih or v il ; v cc = 4.5 v i o = 20 ? a; v cc = 4.5 v - 0 0.1 - 0.1 - 0.1 v i o = 5.2 ma; v cc = 4.5 v - 0.16 0.26 - 0.33 - 0.4 v i i input leakage current v i = v cc or gnd; v cc =4.5v --? 0.1 - ? 1- ? 1 ? a i cc supply current v i = v cc or gnd; i o =0a; v cc =4.5v --8.0- 80 - 160 ? a ? i cc additional supply current per input pin; v i =v cc ? 2.1 v; other inputs at v cc or gnd; v cc = 4.5 v to 5.5 v dn and ds inputs - 35 126 - 157.5 - 171.5 ? a cp and ce inputs - 80 288 - 360 - 392 ? a mr input - 40 144 - 180 - 196 ? a pe input - 60 216 - 270 - 294 ? a c i input capacitance -3.5-- - - - pf table 6. static characteristics ?continued at recommended operating conditions; volt ages are referenced to gnd (ground = 0 v). symbol parameter conditions 25 ?c ? 40 ? c to +85 ?c ? 40 ? c to +125 ?c unit min typ max min max min max
74hc_hct166_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 25 september 2013 9 of 19 nxp semiconductors 74hc166-q100; 74hct166-q100 8-bit parallel-in/seria l out shift register 10. dynamic characteristics table 7. dynamic characteristics gnd (ground = 0 v); t r = t f = 6 ns: c l = 50 pf unless otherwise specif ied; for test circuit, see figure 10 symbol parameter conditions 25 ?c ? 40 ?c to +85 ? c ? 40 ? c to +125 ?c unit min typ max min max min max 74hc166-q100 t pd propagation delay cp to q7; see figure 7 [1] v cc = 2.0 v - 50 150 - 190 - 225 ns v cc = 4.5 v - 18 30 - 38 - 45 ns v cc = 5.0 v; c l =15pf - 15 - - - - - ns v cc = 6.0 v - 14 26 - 33 - 38 ns mr to q7; see figure 8 v cc = 2.0 v - 47 160 - 200 - 240 ns v cc = 4.5 v - 17 32 - 40 - 48 ns v cc = 5.0 v; c l =15pf - 14 - - - - - ns v cc = 6.0 v - 14 27 - 34 - 41 ns t t transition time output; see figure 7 [2] v cc = 2.0 v - 19 75 - 95 - 110 ns v cc = 4.5 v - 7 15 - 19 - 22 ns v cc = 6.0 v - 6 13 - 16 - 19 ns t w pulse width cp input high or low; see figure 7 v cc = 2.0 v 80 17 - 100 - 120 - ns v cc = 4.5 v 16 6 - 20 - 24 - ns v cc = 6.0 v 14 5 - 17 - 20 - ns mr input low; see figure 8 v cc = 2.0 v 100 25 - 125 - 150 - ns v cc = 4.5 v 20 9 - 25 - 30 - ns v cc = 6.0 v 17 7 - 21 - 26 - ns t rec recovery time mr to cp; see figure 8 v cc = 2.0 v 0 ? 19 - 0 - 0 - ns v cc = 4.5 v 0 ? 7- 0 - 0 - ns v cc = 6.0 v 0 ? 6- 0 - 0 - ns t su set-up time dn, ce to cp; see figure 9 v cc = 2.0 v 80 14 - 100 - 120 - ns v cc = 4.5 v 16 5 - 20 - 24 - ns v cc = 6.0 v 14 4 - 17 - 20 - ns pe to cp; see figure 9 v cc = 2.0 v 100 33 - 125 - 150 - ns v cc = 4.5 v 20 12 - 25 - 30 - ns v cc = 6.0 v 17 10 - 21 - 26 - ns
74hc_hct166_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 25 september 2013 10 of 19 nxp semiconductors 74hc166-q100; 74hct166-q100 8-bit parallel-in/seria l out shift register t h hold time dn, ce to cp; see figure 9 v cc = 2.0 v 2 ? 8- 2 - 2 - ns v cc = 4.5 v 2 ? 3- 2 - 2 - ns v cc = 6.0 v 2 ? 2- 2 - 2 - ns pe to cp; see figure 9 v cc = 2.0 v 0 ? 28 - 0 - 0 - ns v cc = 4.5 v 0 ? 10 - 0 - 0 - ns v cc = 6.0 v 0 ? 8- 0 - 0 - ns f max maximum frequency cp input; see figure 7 v cc = 2.0 v 6 19 - 4.8 - 4 - mhz v cc = 4.5 v 30 57 - 24 - 20 - mhz v cc = 5.0 v; c l =15pf-63---- - mhz v cc = 6.0 v 35 68 - 28 - 24 - mhz c pd power dissipation capacitance per package; v i =gndtov cc [3] -41---- - pf 74hct166-q100 t pd propagation delay cp to q7; see figure 7 [1] v cc = 4.5 v - 23 40 - 50 - 60 ns v cc = 5.0 v; c l =15pf - 20 - - - - - ns mr to q7; see figure 8 v cc = 4.5 v - 22 40 - 50 - 60 ns v cc = 5.0 v; c l =15pf - 19 - - - - - ns t t transition time output; see figure 7 [2] v cc = 4.5 v - 7 15 - 19 - 22 ns t w pulse width cp input high or low; see figure 7 v cc = 4.5 v 20 9 - 25 - 30 - ns mr input low; see figure 8 v cc = 4.5 v 25 11 - 31 - 38 - ns t rec recovery time mr to cp; see figure 8 v cc = 4.5 v 0 ? 7- 0 - 0 - ns t su set-up time dn, ce to cp; see figure 9 v cc = 4.5 v 16 8 - 20 - 24 - ns pe to cp; see figure 9 v cc = 4.5 v 30 15 - 38 - 45 - ns t h hold time dn, ce to cp; see figure 9 v cc = 4.5 v 0 ? 3- 0 - 0 - ns pe to cp; see figure 9 v cc = 4.5 v 0 ? 13 - 0 - 0 - ns table 7. dynamic characteristics ?continued gnd (ground = 0 v); t r = t f = 6 ns: c l = 50 pf unless otherwise specif ied; for test circuit, see figure 10 symbol parameter conditions 25 ?c ? 40 ?c to +85 ? c ? 40 ? c to +125 ?c unit min typ max min max min max
74hc_hct166_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 25 september 2013 11 of 19 nxp semiconductors 74hc166-q100; 74hct166-q100 8-bit parallel-in/seria l out shift register [1] t pd is the same as t phl and t plh . [2] t t is the same as t thl and t tlh . [3] c pd is used to determine the dynamic power dissipation (p d in ? w). p d = c pd ? v cc 2 ? f i + ?? (c l ? v cc 2 ? f o ) where: f i = input frequency in mhz; f o = output frequency in mhz; ? (c l ? v cc 2 ? f o ) = sum of outputs; c l = output load capacitance in pf; v cc = supply voltage in v. 11. waveforms f max maximum frequency cp input; see figure 7 v cc = 4.5 v 25 45 - 20 - 17 - mhz v cc = 5.0 v; c l =15pf-50---- - mhz c pd power dissipation capacitance per package; v i =gndtov cc [3] -41---- - pf table 7. dynamic characteristics ?continued gnd (ground = 0 v); t r = t f = 6 ns: c l = 50 pf unless otherwise specif ied; for test circuit, see figure 10 symbol parameter conditions 25 ?c ? 40 ?c to +85 ? c ? 40 ? c to +125 ?c unit min typ max min max min max measurement points are given in table 8 . v ol and v oh are typical voltage output levels that occur with the output load. fig 7. clock (cp) to output (q7) propagation delays, pulse width, output transition times and maximum frequency aaa-008821 cp input q7 output 90 % 10 % 10 % 90 % gnd v m v i v oh v ol v m t w t phl t plh t tlh t thl 1/f max
74hc_hct166_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 25 september 2013 12 of 19 nxp semiconductors 74hc166-q100; 74hct166-q100 8-bit parallel-in/seria l out shift register measurement points are given in table 8 . v ol and v oh are typical voltage output levels that occur with the output load. fig 8. master reset (mr) pulse width, mr to output (q7) propagation delay and mr to clock (cp) recovery time. aaa-008822 q7 output v m t phl v m mr input v m t w v i gnd t rec v i v oh v ol gnd cp input the shaded areas indicate when the input is per mitted to change for predictable output performance measurement points are given in table 8 . (1) ce may change only from high-to-low while cp is low fig 9. set-up and hold times aaa-008823 v m v i gnd v i gnd v i gnd v i gnd v i gnd v m see note (1) ce input pe input dn input v m v m ds input stable v m cp input condition: mr = high stable t h t h t h t su t su t su t h t h t su t h t su t h t w t su t su
74hc_hct166_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 25 september 2013 13 of 19 nxp semiconductors 74hc166-q100; 74hct166-q100 8-bit parallel-in/seria l out shift register table 8. measurement points type input output v i v m v m 74hc166-q100 v cc 0.5v cc 0.5v cc 74hct166-q100 3 v 1.3 v 1.3 v test data is given in table 10 . definitions for test circuit: r t = termination resistance should be equal to output impedance z o of the pulse generator. c l = load capacitance including jig and probe capacitance. r l = load resistance. s1 = test selection switch fig 10. test circuit for measuring switching times v m v m t w t w 10 % 90 % 0 v v i v i negative pulse positive pulse 0 v v m v m 90 % 10 % t f t r t r t f 001aad983 dut v cc v cc v i v o r t r l s1 c l open g table 9. test data type input load s1 position v i t r , t f c l r l t phl , t plh 74hc166-q100 v cc 6ns 15pf, 50 pf 1k ? open 74hct166-q100 3 v 6 ns 15 pf, 50 pf 1 k ? open
74hc_hct166_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 25 september 2013 14 of 19 nxp semiconductors 74hc166-q100; 74hct166-q100 8-bit parallel-in/seria l out shift register 12. package outline fig 11. package outline sot109-1 (so16) x w m a a 1 a 2 b p d h e l p q detail x e z e c l v m a (a ) 3 a 8 9 1 16 y pin 1 index unit a max. a 1 a 2 a 3 b p cd (1) e (1) (1) eh e ll p qz ywv references outline version european projection issue date iec jedec jeita mm inches 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.0 9.8 4.0 3.8 1.27 6.2 5.8 0.7 0.6 0.7 0.3 8 0 o o 0.25 0.1 dimensions (inch dimensions are derived from the original mm dimensions) note 1. plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 1.0 0.4 sot109-1 99-12-27 03-02-19 076e07 ms-012 0.069 0.010 0.004 0.057 0.049 0.01 0.019 0.014 0.0100 0.0075 0.39 0.38 0.16 0.15 0.05 1.05 0.041 0.244 0.228 0.028 0.020 0.028 0.012 0.01 0.25 0.01 0.004 0.039 0.016 0 2.5 5 mm scale so16: plastic small outline package; 16 leads; body width 3.9 mm sot109-1
74hc_hct166_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 25 september 2013 15 of 19 nxp semiconductors 74hc166-q100; 74hct166-q100 8-bit parallel-in/seria l out shift register fig 12. package outline sot403-1 (tssop16) unit a 1 a 2 a 3 b p cd (1) e (2) (1) eh e ll p qz ywv references outline version european projection issue date iec jedec jeita mm 0.15 0.05 0.95 0.80 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 0.4 0.3 0.40 0.06 8 0 o o 0.13 0.1 0.2 1 dimensions (mm are the original dimensions) notes 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. plastic interlead protrusions of 0.25 mm maximum per side are not included. 0.75 0.50 sot403-1 mo-153 99-12-27 03-02-18 w m b p d z e 0.25 18 16 9 a a 1 a 2 l p q detail x l (a ) 3 h e e c v m a x a y 0 2.5 5 mm scale tssop16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm sot403-1 a max. 1.1 pin 1 index
74hc_hct166_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 25 september 2013 16 of 19 nxp semiconductors 74hc166-q100; 74hct166-q100 8-bit parallel-in/seria l out shift register 13. abbreviations 14. revision history table 10. abbreviations acronym description cmos complementary metal-oxide semiconductor dut device under test esd electrostatic discharge hbm human body model mm machine model ttl transistor-transistor logic table 11. revision history document id release date data sheet status change notice supersedes 74hc_hct166_q100 v.1 20130925 product data sheet - -
74hc_hct166_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 25 september 2013 17 of 19 nxp semiconductors 74hc166-q100; 74hct166-q100 8-bit parallel-in/seria l out shift register 15. legal information 15.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term ?short data sheet? is explained in section ?definitions?. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple device s. the latest product status information is available on the internet at url http://www.nxp.com . 15.2 definitions draft ? the document is a draft versi on only. the content is still under internal review and subject to formal approval, which may result in modifications or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall hav e no liability for the consequences of use of such information. short data sheet ? a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request vi a the local nxp semiconductors sales office. in case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. product specification ? 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aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the terms and conditions of commercial sale of nxp semiconductors. right to make changes ? nxp semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use in automotive applications ? this nxp semiconductors product has been qualified for use in automotive applications. unless otherwise agreed in writing, the product is not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an nxp semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. nxp semiconductors and its suppliers accept no liability for inclusion and/or use of nxp semiconducto rs products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. applications ? applications that are described herein for any of these products are for illustrative purpos es only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. customers are responsible for the design and operation of their applications and products using nxp semiconductors products, and nxp semiconductors accepts no liability for any assistance with applications or customer product design. it is customer?s sole responsibility to determine whether the nxp semiconductors product is suitable and fit for the customer?s applications and products planned, as well as fo r the planned application and use of customer?s third party customer(s). customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. nxp semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer?s applications or products, or the application or use by customer?s third party customer(s). customer is responsible for doing all necessary testing for the customer?s applic ations and products using nxp semiconductors products in order to av oid a default of the applications and the products or of the application or use by customer?s third party customer(s). nxp does not accept any liability in this respect. limiting values ? stress above one or more limiting values (as defined in the absolute maximum ratings system of iec 60134) will cause permanent damage to the device. limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the recommended operating conditions section (if present) or the characteristics sections of this document is not warranted. constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. terms and conditions of commercial sale ? nxp semiconductors products are sold subject to the gener al terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms , unless otherwise agreed in a valid written individual agreement. in case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. nxp semiconductors hereby expressly objects to applying the customer?s general terms and conditions with regard to the purchase of nxp semiconducto rs products by customer. document status [1] [2] product status [3] definition objective [short] data sheet development this document contains data from the objecti ve specification for product development. preliminary [short] data sheet qualification this document contains data from the preliminary specification. product [short] data sheet production this document contains the product specification.
74hc_hct166_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 25 september 2013 18 of 19 nxp semiconductors 74hc166-q100; 74hct166-q100 8-bit parallel-in/seria l out shift register no offer to sell or license ? nothing in this document may be interpreted or construed as an offer to sell products t hat is open for acceptance or the grant, conveyance or implication of any licens e under any copyrights, patents or other industrial or intellectual property rights. export control ? this document as well as the item(s) described herein may be subject to export control regu lations. export might require a prior authorization from competent authorities. translations ? a non-english (translated) version of a document is for reference only. the english version shall prevail in case of any discrepancy between the translated and english versions. 15.4 trademarks notice: all referenced brands, produc t names, service names and trademarks are the property of their respective owners. 16. contact information for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com
nxp semiconductors 74hc166-q100; 74hct166-q100 8-bit parallel-in/seria l out shift register ? nxp b.v. 2013. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please se nd an email to: salesaddresses@nxp.com date of release: 25 september 2013 document identifier: 74hc_hct166_q100 please be aware that important notices concerning this document and the product(s) described herein, have been included in section ?legal information?. 17. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 ordering information . . . . . . . . . . . . . . . . . . . . . 1 4 functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 pinning information . . . . . . . . . . . . . . . . . . . . . . 4 5.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 5.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 6 functional description . . . . . . . . . . . . . . . . . . . 5 7 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 6 8 recommended operating conditions. . . . . . . . 7 9 static characteristics. . . . . . . . . . . . . . . . . . . . . 7 10 dynamic characteristics . . . . . . . . . . . . . . . . . . 9 11 waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 12 package outline . . . . . . . . . . . . . . . . . . . . . . . . 14 13 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 16 14 revision history . . . . . . . . . . . . . . . . . . . . . . . . 16 15 legal information. . . . . . . . . . . . . . . . . . . . . . . 17 15.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 17 15.2 definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 15.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 15.4 trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 18 16 contact information. . . . . . . . . . . . . . . . . . . . . 18 17 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

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